Check for Thumb-2 more explicitly.

block_to_imp.c

@@ -168,7 +168,7 @@ IMP imp_implementationWithBlock(void *block)
 			h->fnptr = (void(*)(void))b->invoke;
 			h->block = b;
 			uintptr_t addr = (uintptr_t)&set->buffers->rx_buffer[i*sizeof(struct block_header)];
-#if ((__ARM_ARCH >= 7) || defined (__ARM_ARCH_6T2__))
+#if (__ARM_ARCH_ISA_THUMB == 2)
 			// If the trampoline is Thumb-2 code, then we must set the low bit
 			// to 1 so that b[l]x instructions put the CPU in the correct mode.
 			addr |= 1;

block_trampolines.S

@@ -105,7 +105,7 @@
 // AArch32 (ARM) trampoline
 ////////////////////////////////////////////////////////////////////////////////
 
-#	if ((__ARM_ARCH >= 7) || defined (__ARM_ARCH_6T2__))
+#	if (__ARM_ARCH_ISA_THUMB == 2)
 // If we're on a target that supports Thumb 2, then we need slightly more
 // instructions to support Thumb/ARM code for the IMP and so we need to make
 // the trampolines thumb to be able to fit them in 16 bytes (they fit exactly
@@ -125,7 +125,7 @@
 	ldr \arg0, [r12, #-8]       // Load the block pointer over self
 	ldr pc, [r12, #-4]          // Jump to the block function
 .endm
-#	endif // ((__ARM_ARCH >= 7) || defined (__ARM_ARCH_6T2__))
+#	endif // (__ARM_ARCH_ISA_THUMB == 2)
 #define ARG0 r0
 #define ARG1 r1
 #define SARG0 r1